Senior Staff Hardware Engineer Technical Lead, AI Infrastructure

The Emergent AI infrastructure team in Google is looking to build the next generation of on-prem AI infrastructure to bring the best of Google to empower Frontier model and AI solution builders to advance the state of the art for AI around the world.
This team is looking for engineers with exposure to fully integrated AI infrastructure systems, from Hardware to Software design and workload management. In this role, you will have experience building very large AI clusters using the latest technologies for AI acceleration and cluster interconnects and networking. We are looking to build the AI infrastructure for the future, so if you are interested in how you could build a brand new product rather than just evolving an existing one, this may be the role you are looking for.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $236000 - $329000 (USD) + 25% bonus target + equity + benefits
Learn more about
benefits at Google
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Minimum qualifications
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field, or equivalent practical experience.
8 years of experience working in a hardware systems development, including experience in the functional management and oversight of hardware programs technical environment.
5 years of experience in technical leadership.
Experience directing the full hardware product lifecycle from early concept to high-volume deployment.
Experience leading organizations, including Joint Design Manufacturers (JDMs), Contract Manufacturers (CMs), external vendors, and cross-functional engineering teams, to deliver hardware programs.
Experience defining system-level architecture strategy and exercising cross-functional leadership to develop hardware systems.

Preferred qualifications
Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field.
Experience leading system architecture strategy and governing board and electrical engineering implementations through matrixed technical teams.
Experience expanding enterprise or data center infrastructures by evaluating, optimizing, and integrating third-party hardware technologies and vendor products.
Experience defining long-term technology roadmaps, driving hardware innovation, and steering resource allocation to resolve system-level challenges, delegating operational tasks.
Proven track record of synthesizing complex engineering data to lead cross-functional groups and external partners through ambiguous root-cause analysis.
Demonstrated success in building, mentoring, and expanding high-performing hardware engineering teams.

Responsibilities
Direct system architecture strategy for data center AI infrastructure, guiding cross-functional engineering disciplines and key vendors in evaluating, integrating, and optimizing third-party hardware platforms.
Govern product lifecycle execution from conceptualization to high-volume manufacturing by directing Joint Design Manufacturers (JDMs) and Contract Manufacturers (CMs), influencing partner roadmaps, and establishing robust Design for Manufacturability (DFM) and Design for Testability (DFT) strategies.
Define the overarching lab validation and system bring-up strategy, explicitly delegating operational execution and detailed root-cause analysis to cross-functional testing teams and external contractors, while maintaining strategic oversight of the hardware ecosystem.
Exercise cross-functional leadership to drive the strategic scaling of Emergent AI infrastructure, steering matrixed engineering disciplines (Silicon, Firmware, Software, Thermal, Mechanical, and Operations) to deliver cohesive, enterprise-grade solutions.