ASIC DFT Engineer - Acacia (Hybrid)
Cisco
San Jose, California, United States of America Posted October 27, 2026
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Job Description
Exciting opportunity for a Design-for-Testability (DFT) Engineer to support DFT implementation, validation, and signoff for complex ASIC / SoC designs. Key responsibilities include hands-on DFT tasks and collaboration with cross-functional teams. Ideal for candidates with ASIC DFT experience and strong scripting skills.
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