ASIC Physical Design Engineer

Cisco

San Jose, California, United States of America Posted October 27, 2026

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On-site Full-time Mid level
Job Description

Take on the role of ASIC Physical Design Engineer, contributing to the RTL-to-GDSII implementation for advanced semiconductor nodes. Optimize floor planning, analyze design flows, and collaborate across teams to deliver high-performance networking chips. Ideal for candidates with strong experience in physical design and semiconductor process technologies.

Required Skills
collaboration
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