Senior ASIC RTL Engineer

Cisco

San Jose, California, United States of America Posted October 21, 2026

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On-site Full-time Senior
Job Description

We are seeking a Senior ASIC RTL Engineer to drive high-quality Design for Test (DFT) RTL for Cisco's Silicon One platform. Collaborate with cross-functional teams to design and develop complex ASICs, focusing on robust and innovative networking hardware. Ideal for experienced ASIC digital design professionals with strong Verilog/System Verilog skills.

Required Skills
collaboration cross-functional collaboration
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